1. Field of the Invention
The present invention relates to a sense amplifier and method, and more particularly, to a current/voltage converter of a sense amplifier.
2. Background of the Related Art
A related art sense amplifier includes a current/voltage converter and a differential amplifier. The differential amplifier, which is used mostly in the input stage, can alternatively be replaced by a voltage comparater. Thus, a sense amplifier generally performs the function of detecting the unamplified voltage level or the unamplified current level of input signals exceeding a threshold value in the current/voltage converter, and then amplifying and outputting the detected signals in the differential amplifier or the voltage comparator. The sense amplifier detects the input signals only in a specified time domain. Such sense amplifiers are used for sensing and amplifying the very small output signals of memory devices, etc.
As shown in FIG. 1, the related art sense amplifier includes a first current/voltage converter 10 to convert a current applied through a bit line of a memory cell (not illustrated) into a voltage. A second current/voltage converter 20 converts a reference current received from an external transistor (not illustrated) into a voltage, and a voltage comparator 30 compares the voltages converted by the first current voltage converter 10 and the second current/voltage converter 20. The first current/voltage converter 10 has a PMOS transistor P1 with its gate and drain coupled together, and with the power supply voltage V.sub.cc applied to its source. Further, an NMOS transistor N1 has the drain of the PMOS transistor P1 is coupled to its source, the bit line coupled to its drain, and its gate coupled to the bit line through an inverter INV1.
The second current/voltage converter 20 has a PMOS transistor P2 with its gate and drain coupled to each other and with the power supply voltage V.sub.cc applied to its source. Further, an NMOS transistor N2 has the drain of the PMOS transistor P2 coupled to its source, an external random reference current coupled to its drain, and the reference current coupled to its gate through an inverter INV2.
The operation of the related art sense amplifier including the first and second current/voltage converters 10, 20 is as follows. First, when a low-level signal is applied to the inverter INV1 of the first current/voltage converter 10 through the bit line of the memory cell (not illustrated), the low-level signal is inverted by the inverter INV1 and applied to the gate of the NMOS transistor N1.
Accordingly, as the NMOS transistor N1 is turned ON and the low-level signal is applied to the gate and the drain of the PMOS transistor P1, the PMOS transistor P1 is turned ON and the node A becomes low-level. The node A becomes low level because a current sink is created when the current at the node A discharges through the turned ON NMOS transistor N1.
When, a high-level signal is applied to the inverter INV1 of the current/voltage converter 10, the high-level signal is inverted and applied to the gate of the NMOS transistor N1. Consequently, the NMOS transistor N1 is turned OFF. At that time, a specified bias voltage of about 4 V is applied to the node A and the gate of the PMOS transistor P1. Thus, the PMOS transistor P1 is turned ON. Accordingly, the power supply voltage V.sub.cc is applied to the node A, which transitions to a complete high level state.
The second current/voltage converter 20 is operated in the same way as the first current/voltage converter 10. The voltage comparator 30 compares and outputs the voltage difference between the node A of the first current/voltage converter 10 and node B of the second current/voltage converter 20.
The NMOS transistor N1 with the inverter INV1, and the NMOS transistor N2 with the inverter INV2 maintain the bias level of the inputs at a specified level. The PMOS transistors P1, P2 function as active loads. The current/voltage converters may also include various pulse signal generators depending on the user's requirements.
The operation of the related art sense amplifier will further be described by an example. When the input current is 20 .mu.A and the reference current is 10 .mu.A, the current flowing through the PMOS transistor P1 is 20 .mu.A because there is no amplification of the input current. Since the PMOS transistors P1, P2 function as active loads, however, they have a resistance value. If the resistance value is 30 k.OMEGA. for the PMOS transistors P1, P2, the voltage drop is 30 k.OMEGA..times.20 .mu.A=0.6 V. In the second current/voltage converter 20, the first current/voltage converter 10 voltage drop is 30 k.OMEGA..times.10 .mu.A=0.3 V. Accordingly, voltages of 4.4 V and 4.7 V are applied to the node A and to the node B, respectively. Therefore, the voltage comparator 30 compares and outputs the voltage difference between the nodes A and B.
FIG. 2 is a graph of the change in the voltage over time on the node A, which is an output point of the first current/voltage converter 10. A simulation was performed by coupling various MOS transistors having threshold voltages of 0.7 V, 1.5 V, 2.2 V and 4 V as the threshold voltages of the memory cells to the input of the first current/voltage converter 10. When the nanometer channel W/L (width/length) is 600/800 for a related art sense amplifier in the simulation, the voltage difference of the node A between memory cells of 0.7 V (3.312 V) and 4 V (3.779 V) is 0.467 V (3.779 V-3.312 V), as shown in FIG. 2.
When related art sense amplifiers are used with a multibit memory, the difference between the currents by the threshold voltage of the memory cells is small. Thus, even after the voltage is converted in the current/voltage converter of the sense amplifier, the difference between the converted voltages is small. Therefore, the related art sense amplifiers suffer the problem that it is difficult to make a comparison in the voltage comparator.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.